The invention relates to a semiconductor device and to a fabrication method suitable therefore.
If semiconductor devices are intended to have a soft switching behaviour, they must be designed in such a way as to avoid current chopping during switching. Current chopping occurs for example during hard commutation of diodes. The consequence of such current chopping is that severe voltage or current oscillations occur. If such oscillations exceed maximum values permissible for the diode, then destruction of the diode may occur. Destruction of the diode may also be caused by excessive interference effects on driving processes which are brought about by the current or voltage fluctuations, and resultant incorrect behaviour of the driving processes. The problem area described above occurs particularly in the case of circuits having high leakage inductance, high currents (for example in the case of power semiconductors being connected in parallel to a great extent) and at high voltages with respect to which the diode is commutated.
In order to realize diodes having a soft switching behaviour, the thickness of the diodes has been designed such that at maximum voltage the space charge zone that forms, proceeding from the pn junction formed by the p-doped anode region and the adjoining lightly n-doped base region in the semiconductor volume, does not reach the highly n-doped rear-side emitter. However, this entails high on-state losses and switching losses, since the overall losses of semiconductor devices, in particular bipolar semiconductor devices, increase approximately quadratically with the thickness of the lightly doped base region (chip thickness). A soft switching behaviour is difficult to realize particularly for high-voltage devices (having a rated voltage of more than 150 V, in particular starting from a rated voltage of approximately 500 V), since a basic material with a doping concentration that is significantly lower than would be necessary for achieving the required reverse voltage is usually used for fabricating such components. The low doping concentration of the basic material serves for realizing the DC voltage blocking stability of the semiconductor device, which in turn necessitates sufficiently low field strengths at the anode and in the region of the edge termination of the semiconductor device. The low basic doping has the effect that the space charge zone propagates very far, which has to be compensated for by means of a large chip thickness of the semiconductor device if the intention is to ensure that the space charge zone does not reach the rear-side emitter.
In order to keep down the chip thicknesses, it has been proposed to introduce a field stop zone, that is to say a zone of increased doping, in the semiconductor volume of the semiconductor device, which zone may be configured in stepped fashion, for example. FIG. 1 shows a corresponding doping profile 1 with a stepped field stop zone using the example of a diode. What is disadvantageous in this case is that difficult and expensive processes are required for producing the stepped, inhomogeneous doping profile 1: thus, an epitaxial method is required for example for fabricating the doping profile (the high doping of the carrier substrate on which the epitaxial layer is deposited is not illustrated in FIG. 1). As an alternative, it is possible to use a diffusion process, but this would take up about 100 hours at a process temperature of 1200° C. and so is not very suitable in practice. A doping profile 2 that can be produced by means of such a diffusion process is likewise indicated in FIG. 1.